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Data Center News > Blog > AI > How Microsoft’s next-gen BitNet architecture is turbocharging LLM efficiency
AI

How Microsoft’s next-gen BitNet architecture is turbocharging LLM efficiency

Last updated: November 14, 2024 3:20 am
Published November 14, 2024
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How Microsoft's next-gen BitNet architecture is turbocharging LLM efficiency
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One-bit giant language fashions (LLMs) have emerged as a promising strategy to creating generative AI extra accessible and reasonably priced. By representing mannequin weights with a really restricted variety of bits, 1-bit LLMs dramatically scale back the reminiscence and computational sources required to run them.

Microsoft Research has been pushing the boundaries of 1-bit LLMs with its BitNet structure. In a new paper, the researchers introduce BitNet a4.8, a brand new approach that additional improves the effectivity of 1-bit LLMs with out sacrificing their efficiency.

The rise of 1-bit LLMs

Conventional LLMs use 16-bit floating-point numbers (FP16) to signify their parameters. This requires a whole lot of reminiscence and compute sources, which limits the accessibility and deployment choices for LLMs. One-bit LLMs tackle this problem by drastically lowering the precision of mannequin weights whereas matching the efficiency of full-precision fashions.

Earlier BitNet fashions used 1.58-bit values (-1, 0, 1) to signify mannequin weights and 8-bit values for activations. This strategy considerably lowered reminiscence and I/O prices, however the computational value of matrix multiplications remained a bottleneck, and optimizing neural networks with extraordinarily low-bit parameters is difficult. 

Two strategies assist to handle this downside. Sparsification reduces the variety of computations by pruning activations with smaller magnitudes. That is notably helpful in LLMs as a result of activation values are likely to have a long-tailed distribution, with just a few very giant values and lots of small ones.  

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Quantization, then again, makes use of a smaller variety of bits to signify activations, lowering the computational and reminiscence value of processing them. Nevertheless, merely reducing the precision of activations can result in important quantization errors and efficiency degradation.

Moreover, combining sparsification and quantization is difficult, and presents particular issues when coaching 1-bit LLMs. 

“Each quantization and sparsification introduce non-differentiable operations, making gradient computation throughout coaching notably difficult,” Furu Wei, Accomplice Analysis Supervisor at Microsoft Analysis, instructed VentureBeat.

Gradient computation is crucial for calculating errors and updating parameters when coaching neural networks. The researchers additionally had to make sure that their strategies may very well be carried out effectively on present {hardware} whereas sustaining the advantages of each sparsification and quantization.

BitNet a4.8

BitNet a4.8 addresses the challenges of optimizing 1-bit LLMs by way of what the researchers describe as “hybrid quantization and sparsification.” They achieved this by designing an structure that selectively applies quantization or sparsification to totally different parts of the mannequin based mostly on the particular distribution sample of activations. The structure makes use of 4-bit activations for inputs to consideration and feed-forward community (FFN) layers. It makes use of sparsification with 8 bits for intermediate states, maintaining solely the highest 55% of the parameters. The structure can also be optimized to benefit from present {hardware}.

“With BitNet b1.58, the inference bottleneck of 1-bit LLMs switches from reminiscence/IO to computation, which is constrained by the activation bits (i.e., 8-bit in BitNet b1.58),” Wei stated. “In BitNet a4.8, we push the activation bits to 4-bit in order that we are able to leverage 4-bit kernels (e.g., INT4/FP4) to convey 2x velocity up for LLM inference on the GPU gadgets. The mixture of 1-bit mannequin weights from BitNet b1.58 and 4-bit activations from BitNet a4.8 successfully addresses each reminiscence/IO and computational constraints in LLM inference.”

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BitNet a4.8 additionally makes use of 3-bit values to signify the important thing (Okay) and worth (V) states within the consideration mechanism. The KV cache is a vital part of transformer fashions. It shops the representations of earlier tokens within the sequence. By reducing the precision of KV cache values, BitNet a4.8 additional reduces reminiscence necessities, particularly when coping with lengthy sequences. 

The promise of BitNet a4.8

Experimental outcomes present that BitNet a4.8 delivers efficiency akin to its predecessor BitNet b1.58 whereas utilizing much less compute and reminiscence.

In comparison with full-precision Llama fashions, BitNet a4.8 reduces reminiscence utilization by an element of 10 and achieves 4x speedup. In comparison with BitNet b1.58, it achieves a 2x speedup by way of 4-bit activation kernels. However the design can ship rather more.

“The estimated computation enchancment relies on the present {hardware} (GPU),” Wei stated. “With {hardware} particularly optimized for 1-bit LLMs, the computation enhancements could be considerably enhanced. BitNet introduces a brand new computation paradigm that minimizes the necessity for matrix multiplication, a major focus in present {hardware} design optimization.”

The effectivity of BitNet a4.8 makes it notably suited to deploying LLMs on the edge and on resource-constrained gadgets. This may have vital implications for privateness and safety. By enabling on-device LLMs, customers can profit from the ability of those fashions without having to ship their information to the cloud.

Wei and his group are persevering with their work on 1-bit LLMs.

“We proceed to advance our analysis and imaginative and prescient for the period of 1-bit LLMs,” Wei stated. “Whereas our present focus is on mannequin structure and software program help (i.e., bitnet.cpp), we goal to discover the co-design and co-evolution of mannequin structure and {hardware} to totally unlock the potential of 1-bit LLMs.”

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