The European Processor Initiative is working to realize digital sovereignty in high-performance computing by creating European-made processors.
Virtually ten years in the past, the European Fee determined it wanted a particular Framework Partnership Settlement (FPA) that will sort out the concept of a European-made processor – if not produced in Europe, then definitely designed and considered in Europe. Even earlier than making a particular Joint Endeavor, that will synchronise and plot the best way for European HPC efforts – the EuroHPC Joint Undertaking – the European Fee included such a plan into the Horizon 2020 programme, probably the most expansive analysis and innovation funding programme on the continent.
The European Processor Initiative
A bunch of trade and analysis individuals shaped a consortium, referred to as the European Processor Initiative (EPI), to use to the subject underneath the LEIT: ICT work programme. EPI then gained the FPA and began off in 2018, underneath the Particular Grant Settlement 1 (SGA1). The particular problem of the subject was supporting the creation of a world-class European Excessive-Efficiency Computing and Huge Information ecosystem constructed on two exascale computing machines, which rank within the first three locations on the planet. Along with that, the objective was to “set up, keep and implement a strategic analysis and innovation roadmap for constructing European low-power microprocessor applied sciences underpinning the build-up of future machines for exascale-class HPC, massive knowledge and rising functions.” Such a processor would assist “foster an HPC ecosystem capable of developing new European technology such as low-power HPC chips”.
In a risky geopolitical state of affairs of the current day, the European plan to work in the direction of digital sovereignty grew to become not solely a analysis and growth effort, however an important a part of the political agenda. In accordance with the conclusions of the European Council from 18 April 2024, ‘the European Council will guarantee an built-in method throughout all coverage areas to extend productiveness and sustainable and inclusive progress all through Europe, construct a strong, modern and resilient financial system and advance Europe’s distinctive social and financial mannequin that can enhance the Union’s aggressive transition in the direction of digital sovereignty in a self-determined and open method’.
The primary stage (SGA1)
The necessity to grow to be extra unbiased in all fields, particularly digitally, can now not be considered as only a strategic concept however a necessity and a precedence. The primary stage of EPI, the SGA1, thus gathered 28 companions from ten nations, with a robust dedication from each analysis and industrial sides, to do no matter was of their energy and knowledgeable functionality to ship this processor and the roadmap for the total size of the EPI.
Creating something from the essential constructing blocks, not to mention a classy and highly effective processor, didn’t come with out its hurdles, and the roadmap, after all, needed to be adjusted to match all of the circumstances, most significantly, the largest wrench thrown in EPI’s and the world’s plans – the worldwide pandemic. The primary stage of EPI led to 2021, with the street to the 2 primary pillars of EPI clear – Arm household and RISC-V household of processors.
The second stage (SGA2)
The second stage of EPI – EPI SGA2 began off with a kick-off in January 2022, with 30 companions from ten nations, now underneath the steering of the shaped joint endeavor – EuroHPC JU.
The plan was to proceed the event of the outcomes from SGA 1: European microprocessors and accelerators to assist European technological autonomy and sovereignty on this important space.
Progressive developments in high-performance computing
Two primary pillars continued from EPI’s plan: an Arm processor household developed by an organization incubated inside EPI – SiPearl, and a RISC-V-based European processor (EPAC).
In November 2023, the challenge introduced the profitable Manufacturing and Silicon Demonstration of its EPAC Accelerator chip model 1.5, marking a major milestone in high-performance computing.
The profitable bring-up of EPAC 1.5 was introduced as a significant step within the growth of the EPI widespread platform, showcasing the number of accelerators that may be built-in in future European supercomputers to effectively tackle a variety of laptop issues.
In July 2025, SiPearl, the corporate incubated inside EPI, introduced that Rhea1, probably the most advanced processor ever designed in Europe, was despatched to tape-out, after SiPearl closed its €130m Sequence A financing spherical with a 3rd and final tranche of €32m. It should grow to be obtainable for sampling in early 2026, and in keeping with SiPearl’s announcement, it’s supported by a variety of compilers, libraries and instruments, from conventional programming languages resembling C/C++, GO and RUST to trendy AI frameworks resembling TensorFlow and PyTorch. Rhea1 is completely suited to conventional HPC workloads – its preliminary goal market – and AI inference workloads.
All these developments have been tasked with a selected and concrete objective in thoughts – one of many missions of EuroHPC JU was to assist deploy world-class supercomputers constructed with European applied sciences and mental property, techniques that can finally empower European analysis and growth (R&D) and industrial growth – and so inclusion of EPI’s IP into European supercomputers concentrating on exascale grew to become crucial. Upcoming Rhea1 shall be included within the JUPITER supercomputer, the quickest supercomputer in Europe. Rhea2, subsequent SiPearl’s processor, was chosen to grow to be part of Alice Recoque – Europe’s latest supercomputer. Alice Recoque shall be primarily based in France, and is on observe to welcome a scalar compute partition primarily based on the Rhea2 processor developed by SiPearl.
Because the challenge is nearing its completion, an up to date roadmap, as a pointer to future developments and outcomes exterior of the challenge, has been introduced.
Promising outcomes from consortium companions
Along with the roadmap, the challenge additionally introduced the start of a few of the outcomes from companions collaborating within the consortium: Supercomputing 25, a number one international HPC convention, was the bottom to announce two main outcomes from partnering establishments.
Firstly, the French CEA-List, introduced the open-source launch of VPSim, the Digital Prototyping Simulator, used for early software-hardware co-validation and efficiency exploration of the European HPC processor. The establishment said that this can allow the institution of a group of {hardware} and software program designers devoted to the European HPC ecosystem, which can speed up design analysis whereas preserving accuracy and software-hardware co-validation phases of next-generation HPC and edge techniques.
Secondly, Zagreb-based analysis group introduced the creation of Proactive Compute, a brand new spin-off from University of Zagreb’s Faculty of Electrical Engineering and Computing (UNIZG-FER), and a showcase of two of its key IPs: FAUST and FEVER. FAUST is a high-performance, pipelined floating-point unit (FPU) IP designed for integration into RISC-V cores with vector processing capabilities, whereas FEVER is a UVM-based RISC-V FPU verification atmosphere that enhances FPU design. It’s a SystemVerilog DPI wrapper which integrates FEVER into the UVM scoreboard to judge the UUT’s outputs.
Extra such IPs are anticipated from EPI consortium companions within the upcoming interval, because the profitable official completion of the challenge is nearing. Along with that, analysis teams from EPI are anticipated to disseminate ultimate outcomes by numerous publications and analysis papers, though an intensive dissemination repository already lists greater than 60 papers, convention proceedings, and ebook chapters from the period of the challenge.
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